2.1    MEMORY LOCATIONS, ADDRESSES & INFORMATION ENCODING   

dl

Address

n bits

Word

0

 

word 0

1

 

word 1

 

.

.

.

.

 

 

i

bn-1

.  .  .  .  . .

b1

b0

word i

 

.

.

.

.

 

 

2k -1

 

word 2k -1

 


Memory locations consist of millions of storage cells which can store a binary digit or bit having value 0 or 1. Group of n bits, called as a word of information can be stored and retrieved in a single basic operation. Here n is the word length – ranging from 16 to 64 bits

Accessing the main memory requires address for each word location 0 to 2k – 1; for some suitable value of k address lines or k address bits. i.e. Main memory of this computer can have up to 2k  words. For example a 24 bit address generates an address space of 224 (16777216) locations ≡16M and a 32 bit address creates an address space of 232   or 4G.

 Contents of the memory locations can represent either instructions or operands. Operands can be either numbers or characters.

       

                    Fig 2.1  Main Memory Address

 

 

 


2.1.1  Representation of Numbers in main memory

 

Consider a 32 bit pattern is used to represent a signed integer

 

                                                              32 bits

                                                           

 

b31

b30

 

b1

b0

                                                                 Fig 2.2

            Sign bit            : b31       = 0 for positive numbers

                                    = 1 for negative numbers

            Magnitude       = b30 . 230 + b29 . 229  + . . . . . + b1 . 21  + b0 . 20

    Magnitude can range from 0 to 231 – 1 and the numbers are said to be in binary positional notation. The above encoding format is called Signed Magnitude representation. The other two binary representations are 1’s compliment and 2’s compliment representations. Representation of positive numbers is the same in the three cases. The difference is only in the negative number representation. In all the three methods the left most bit is the sign bit (i.e.0 represents positive number and 1 represents negative number) 2’s compliment method is the most suitable one and is used in all modern computers.           

2.1.2 Representation of Characters in main memory

Characters can be letters of the alphabet, decimal digits, punctuation marks etc. They are represented by codes that are usually 6 – 8 bits long.

Fig 2.3 shows how 4 characters in ASCII can be stored in a 32 bit word.                                      

 

8 bits

8 bits

8 bits

8 bits

ASCII Character

ASCII Character

ASCII Character

ASCII Character

                                                            Fig 2.3

2.1.3  Representation of Instructions in main memory

A main memory word can also be used to represent an instruction. One part of the word specifies the operation to be performed and the other part specifies operand address. Each of these parts are called as ‘field’.                                                     

 

8 bits

24 bits

Operation field

Addressing information

                                                            Fig 2.4

Here the 8 bit operation field can encode 28 (256) distinct instructions.

  • Addressing information is given in a variety of ways. The different ways in which operands can be named in machine instructions are called addressing modes.
  • Memory words whose addresses are specified by the instructions are interpreted as operands. Whether an operand is a character or a numeric data item is determined by the operation field of the instruction.
  • An operand may be either shorter or longer than one word. An operand length of 8 bit is convenient, because this size is used to encode character data. An 8 bit data is called a byte.

 

2.2               BIG-ENDIAN AND LITTLE ENDIAN ASSIGNMENTS

To enable instructions to refer to individual bytes, the smallest addressable unit in most computers is a byte rather than a word and such computers are called byte addressable. Individual bytes can be addressed in a byte addressable computer. If the word length is 32 bits, then 4 bytes can be placed in a word. The two different schemes used are :-

  1. i)Big-Endian Assignment
  2. ii)Little-Endian Assignment

In Big-endian assignment, bytes are numbered starting with most significant byte of a word. Word is given the same address as its most significant byte (used in 68000 & Power PC processors)

In Little-endian assignment, bytes are numbered from least significant byte of a word. Word is given the address of its least significant byte.

Both the assignments are used in commercial machines. In both cases, byte addresses 0, 4, 8, . . are taken as the addresses of successive words in the memory. These addresses are used when specifying memory read and write operations for words.

 

Word Address

Byte Address

 

Word Address

Byte Address

0

0

1

2

3

 

0

3

2

1

0

4

4

5

6

7

 

4

7

6

5

4

 

.

.

.

 

 

.

.

.

2k - 4

2k - 4

2k - 3

2k - 2

2k - 1

 

2k - 4

2k - 1

2k - 2

2k - 3

2k - 4

 

 

Fig 2.5(i) Big-endian assignment

 

 

 

Fig 2.5(ii) Little-endian assignment

 

2.3     MAIN MEMORY OPERATIONS

To execute an instruction the instructions must be transferred from the main memory to the CPU. This is done by the CPU control circuits.

Operands and results must also be moved between the main memory and the CPU. Thus two basic operations involving the main memory are needed namely

  • Load (or Fetch or Read)
  • Store (or Write)

Load operation: Transfers a copy of the contents of a specific memory location to the CPU. Word in the main memory remains unchanged. To start a Load or Fetch operation, CPU sends the address of the desired location to the main memory and requests to read its contents. The main memory reads the data stored at that address and sends them to the CPU.

Store operation: Transfers a word of information from the CPU to a specific main memory location, destroying the former contents of that location. Here the CPU sends the address of the desired location to the main memory, together with the data to be written to that location.

 

2.3               INSTRUCTIONS AND INSTRUCTION SEQUENCING 

A computer must have instructions capable of performing four types of operations

  1. Data transfers between the main memory and the CPU registers
  2. Arithmetic and logic operations on data
  3. Program sequencing and control
  4. I/O transfers

Notations used:-

  1. a)Register Transfer Notation (RTN):- Possible locations involved in transfer of information are memory location, CPU registers or registers in the I/O subsystem. We identify the names for the addresses of memory location as LOC, PLACE, A, VAR2 etc and the names for CPU registers as R0, R5 etc. The contents of a location or a register are denoted by placing the corresponding name between square brackets.

            E.g.      i)         R1 ← [LOC]               means that the contents of memory location LOC are

transferred into register R1.

            ii)         R3 ← [R1] + [R2]       adds the contents of registers R1 and R2 and then

places their sum into register R3.             

  1. b)Assembly Language Notation:- The same operations can be represented in assembly language format as shown below.

 

E.g.      i)          Move   LOC, R1

                  ii)         Add     R1,R2,R3

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